As serial input/output (IOs) data rates increase to double digit Giga-bytes per second, more powerful equalization methods are required. This is due to the excessive Inter Symbol Interference (ISI) resulting from the properties of the channels carrying such high data rate signals. Examples of channel properties that may cause ISI include poor channel fabrication materials (e.g., FR4 Printed Circuit Boards (PCBs) for links over backplane), intermediate connectors, vias causing reflections and ringing, device packages causing impedance mismatch and reflections, etc.
Decision Feedback Equalizer (DFE) is a widely used apparatus for canceling the ISI generated by formerly transmitted symbols. As its names implies, the DFE takes the symbols that were already decoded, sums them with the right weighting and subtracts this amount from the signal that is presently being decoded. A major limitation of the DFE is related to timing requirements within its feedback loop.